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ISS Coures

The institute was started with the objective of creating a talent pool of trained Engineers both for in-house requirement and to meet the ever growing demand from other MNCs.

Institute of Silicon Systems Pvt Ltd., (ISS) pioneered an industry leading training program in “VLSI Physical Design” for VDSM Technologies, targeted to industry and individuals using industry standard EDA tools ( Cadence Design Systems www.Cadence.com) . It helped to fill the crucial void of trained manpower in the semiconductor industry which is just taking shape in India.

ISS is managed by professionals with more than 33+ years of rich experience (5 to 8 years of experience in USA) in VLSI industry with an aim of building your career to great heights. Our course curriculum is designed by more than twelve industry experienced professionals. ISS has a track record of more than 80% of the students in VLSI industry.

ISS is centrally located in the heart of the city of Hyderabad, Madhapur and well connected by public transport. Our institute is centralized air-conditioned with corporate ambience of a working office.

ISS is presently offering following full time program


VLSI - Physical Design Training

ISS is offering world class industry oriented VLSI - Physical Design training program using Cadence Encounter tool.
Course duration: 20 to 22 weeks.
Time: 9:30 am to 6:30 pm; 5 days a week.
Fee: Rs 90,000 /- (Service tax applicable)
Batch starting on: We will announce in December, 2016.
Entrance exam on: We will announce in December, 2016.
Exam fee: Rs: 200/-

Prerequisites:

B.E/B.Tech/M.E/M.Tech in Electrical/Electronics/VLSI/Embedded Systems/Digital Electronics; 2015/2016 passed out with minimum of 65% marks.

Admission Test Syllabus:

Need to qualify the screening test and technical interview.Test would be conducted in Basic Electronics - BJT, FET, CMOS; Digital Electronics - Number Systems, Boolean Algebra, K-Maps, Logic Gates, Logic Families, Combinational Circuits, Sequential Circuits and Counters. (All are subjective type questions)

Course content:

Fundamental concepts in Digital abstraction, MOSFET switch, CMOS basics, Digital circuit speed, NMOS logic, CMOS logic, combinational logic, sequential logic, synchronous sequential design, timing awareness, setup/hold requirement significance, asynchronous circuits, metastability, synchronization, logic synthesis fundamentals, advanced logic synthesis (PLE based), floor planning, place & route, clock tree synthesis, signal integrity, IR-drop analysis, Static Timing Analysis, low power design techniques and so on.. Cadence tools (SoC Encounter etc.,) are used in training.  The trainees get to work on 5 to 6 projects.  

VLSI - RTL Verification

ISS is offering world class industry oriented VLSI - RTL Verification training program using Cadence Incisive Enterprise Simulator tool.
Course durations: 16 to 18 weeks
Time: 9.30 am to 6.30 pm, 5 days a week.
Fee: Rs: 75,000/- (Service tax applicable)
Batch starting on: 26th December , 2016.
Entrance exam on: 11th December, 2016.
Exam fee: Rs: 200/-

Prerequisites:

B.E/B.Tech/M.E/M.Tech in Electrical/Electronics/VLSI/Embedded Systems/Digital Electronics; 2015/2016 passed out with minimum of 65% marks.

Admission Test Syllabus:

Need to qualify the screening test and technical interview.Test would be conducted in Basic Electronics - BJT, FET, CMOS; Digital Electronics - Number Systems, Boolean Algebra, K-Maps, Logic Gates, Logic Families, Combinational Circuits, Sequential Circuits and Counters. (All are subjective type questions)

Course content:

Fundamental concepts in Digital abstraction, MOSFET switch, CMOS basics, Digital circuit speed, NMOS logic, CMOS logic, combinational logic, sequential logic, synchronous sequential design, timing awareness, setup/hold requirement significance, asynchronous circuits, metastability, synchronization, logic synthesis fundamentals, advanced logic synthesis, Verilog, Verification Flows, Coverage Driven Verification concepts, System Verilog, UVM, Test Bench Components, TLM, Factory Concept, Advantages of UVM flow.

VLSI - Custom Layout Training

ISS is offering world class industry oriented VLSI - Custom Layout training program using Cadence Virtuoso tool.
Course durations: 12 to 14 weeks
Time: 9.30 am to 6.30 pm, 5 days a week.
Fee: Rs: 60,000/- (Service tax applicable)
Batch starting on: We will announce in December, 2016.
Entrance exam on: We will announce in December, 2016.
Exam fee: Rs: 200/-

Prerequisites:

B.E/B.Tech/M.E/M.Tech in Electrical/Electronics/VLSI/Embedded Systems/Digital Electronics; 2015/2016 passed out with minimum of 65% marks.

Admission Test Syllabus:

Need to qualify the screening test and technical interview.Test would be conducted in Basic Electronics - BJT, FET, CMOS; Digital Electronics - Number Systems, Boolean Algebra, K-Maps, Logic Gates, Logic Families, Combinational Circuits, Sequential Circuits and Counters. (All are subjective type questions)

Course content:

Fundamental concepts in Digital abstraction, MOSFET switch, CMOS basics, Digital circuit speed, NMOS logic, CMOS logic, combinational logic, sequential logic, synchronous sequential design, timing awareness, setup/hold requirement significance, asynchronous circuits, metastability, synchronization, logic synthesis fundamentals, advanced logic synthesis, Verilog, Verification Flows, Coverage Driven Verification concepts, System Verilog, UVM, Test Bench Components, TLM, Factory Concept, Advantages of UVM flow.